Clamper Circuit Experiment

Virtual Labs
IIT Kharagpur

Clamper Circuit Experiment

Introduction

Clamper Circuit:
A Clamper circuit can be defined as a circuit that shifts the waveform to a desired reference DC level without changing the actual appearance of the input signal. As the DC level gets shifted, a clamper circuit is also called as a Level Shifter.
A Clamper Circuit adds a input AC signal with a DC level. Using the clamping circuits, the peaks (\(+_{ve}\) and \(-_{ve}\)) of the signals can be placed at desired levels.
Clamper circuits consist of energy storage elements like capacitors. A simple clamper circuit comprises of a capacitor, a diode, a resistor and a dc battery if required.

Objective

To study the behaviour of Clamper circuits for following cases.

Case 1: Positive clamper
Case 2: Positive clamper with positive reference (\( V_r\)) level
Case 3: Positive clamper with negative reference (\( V_r\)) level
Case 4: Negative clamper
Case 5: Negative clamper with positive reference (\( V_r\)) level
Case 6: Negative clamper with negative reference (\( V_r\)) level

Theory

Case 1: Positive clamper
When a negative peak of the signal is clamped above to the zero, then the signal is said to be positively clamped and the circuits is called positive clamper circuit.
A positive calmper circuit consists of a capacitor (C) in series, reverse biased diode (D) in shunt, and a resistor (R) in shunt as in figure below.

Positive clamper

Initially the capacitor is not charged in positive half cycle and the diode is in OFF state. As the capacitor charges to \(-V_m\) in negative half cycle the diode is in ON state.
In the consicuitve positive half cycle, the capacitor is now charged to \(+V_m\) and the diode is in OFF state and gets open circuited. The output of the circuit at this moment will be
\( V_o=V_i+V_m \)
Hence the signal is positively clamped as shown in below figure. The \(V_o\) changes according to the changes in the \(V_i\), but shifts the level according to the charge on the capacitor, as it adds the input \(V_i\).
The input signal \(v_i\) is shown below
Input waveform

The output signal \(v_o\) is shown below
Output waveform

Output waveform

The input-output signal together \(v_i / v_o\) is shown below
Input/Output waveform

Input/Output waveform

Case 2: Positive clamper with positive reference (\( V_r\)) level
A positive calmper with positive reference (\( V_r\)) level circuit consists of a reverse biased diode (D) in shunt, a capacitor (C) in series, reference voltage (\(V_r\)) and a resistor (R) in shunt as in figure below.
Positive clamper with positive reference voltage Vr

Positive clamper with positive reference voltage Vr

The input signal \(v_i\) is shown below
Input waveform

The output signal \(v_o\) is shown below
Output waveform

Output waveform

The input-output signal together \(v_i / v_o\) is shown below
Input/Output waveform

Input/Output waveform

Case 3: Positive clamper with negative reference (\( V_r\)) level
A positive calmper with positive reference (\( V_r\)) level circuit consists of a reverse biased diode (D) in shunt, a capacitor (C) in series, reference voltage (\(V_r\)) and a resistor (R) in shunt as in figure below.
$Positive clamper with negative reference (\( V_r\)) level$
The input signal \(v_i\) is shown below
Input waveform

The output signal \(v_o\) is shown below
Output waveform

Output waveform

The input-output signal together \(v_i / v_o\) is shown below
Input/Output waveform

Input/Output waveform

Case 4: Negative clamper
When a positive peak of the signal is clamped below to the zero, then the signal is said to be negatively clamped and the circuits is called negative clamper circuit.

Negative clamper

The input signal \(v_i\) is shown below
Input waveform

The output signal \(v_o\) is shown below
Output waveform

Output waveform

The input-output signal together \(v_i / v_o\) is shown below
Input/Output waveform

Input/Output waveform

Case 5: Negative clamper with positive reference (\( V_r\)) level
$Negative clamper with positive reference (\( V_r\)) level$
The input signal \(v_i\) is shown below
Input waveform

The output signal \(v_o\) is shown below
Output waveform

Output waveform

The input-output signal together \(v_i / v_o\) is shown below
Input/Output waveform

Input/Output waveform

Case 6: Negative clamper with negative reference (\( V_r\)) level
$Negative clamper with negative reference (\( V_r\)) level$
The input signal \(v_i\) is shown below
Input waveform

The output signal \(v_o\) is shown below
Output waveform

Output waveform

The input-output signal together \(v_i / v_o\) is shown below
Input/Output waveform

Input/Output waveform

Simulation

Instructions

Observe the circuit diagram of the fullwave rectifier
Click on the Power Button.
Select the Amplitide(A) of the input sine wave signal(V_i).
Select the frequency of the signal(f) for the input signal(V_i).
Select the "Channel 1" to observe the input signal on graph
Select the "Channel 2" to observe the rectified output signal on graph
Select the "Dual" to observe the input signal and rectified output signal on graph
Change the values of A, f to observe the variation in the input and output signals.
Hover on the graph to observe the value of the V_i and V_o at that instatnt of time T.
Save the graph if you are done with your experiment.
Note:

Ideal diode is considered

Make sure always Input Signal Amplitude>0 V

Make sure always Input Signal Frequency>0 Hz

Load resistance \( R=1k \Omega \)

Scroll on the knob to vary the value

Instructions

Observe the circuit diagram of the fullwave rectifier
Click on the Power Button.
Select the Amplitide(A) of the input sine wave signal(V_i).
Select the frequency of the signal(f) for the input signal(V_i).
Select the "Channel 1" to observe the input signal on graph
Select the "Channel 2" to observe the rectified output signal on graph
Select the "Dual" to observe the input signal and rectified output signal on graph
Change the values of A, f and V_r to observe the variation in the input and output signals.
Hover on the graph to observe the value of the V_i and V_o at that instatnt of time T.
Save the graph if you are done with your experiment.
Note:

Ideal diode is considered

Make sure always Input Signal Amplitude>0 v

Make sure always Input Signal Frequency>0 Hz

Load resistance \( R=1k \Omega \)

Scroll on the knob to vary the value

Power

Circuit OFF

PCa

PCaWPVr

PCaWNVr

NCa

NCaWPVr

NCaWNVr

Function Generator Controls

V_i = V

f = kHz

Battery Voltage Control

V_r = V

Oscilloscope Controls

Channel 1

V_c1 = V/div

Time = (ms)/div

Position

P_X =

P_Y =

Channel 2

V_c2 = V/div

Time = (ms)/div

Position

P_X =

P_Y =

References

Books

M. Halkias. Integrated Electronics. McGraw-Hill electrical and electronic engineering series. Tata McGraw-Hill Publishing Company, 2001.

NPTEL Lectures

Link 1

Link 2

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